Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Writing code for different bit rates in one of application

Status
Not open for further replies.

vinod_g

Member level 4
Joined
Nov 29, 2006
Messages
71
Helped
8
Reputation
16
Reaction score
2
Trophy points
1,288
Activity points
1,681
hi all ,
I need some valuable suggestions in one of the my design architecture.
I have one design with clock of 20 Mhz it works on 10 MBps and with clock of 10 Mhz it works with 5 Mbps. These clocks i will generate from PLL. For corresponding bit rate i will generate corresponding clock from PLL. Now my Question is

1. How to make it generic in the sense, depending upon selection bit(configurable from outside) I need to select corresponding frequency from my PLL.

I need to design it and targeting for ALTERA.
 

Re: Writing code for different bit rates in one of applicati

Study the datasheet of the FPGA you want to target. If it doesn't support altering divider settings during operation, you'll have a problem.
 

Re: Writing code for different bit rates in one of applicati

Does altera have Muxing buffers.
If so u can try using global muxing buffers.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top