Help me to understand the reasoning behind the following ordering rule imposed by AXI protocol for write data interleaving.
[AXI spec - Chapter 8.5 Write data interleaving]
"The order in which a slave receives the first data item of each transaction must be the same as the order in which it receives the addresses for the transactions
Help me to understand the reasoning behind the following ordering rule imposed by AXI protocol for write data interleaving.
[AXI spec - Chapter 8.5 Write data interleaving]
when multiple masters are connected, suppose master1 and master2 wants to perform a write transaction to the same slave then
Master1 with burst of 4 and Master2 with a burst 8
which means that as the both the masters are accessing the same slave, when Master1 is in idle state during the transaction then interconnect will perform the Master2 transaction.
This happens only in AXI3 where as in AXI4 the Data interleaving is removed as there is no WID for the Data channel.