while doing the cts exclude pins (ignore pins) tool will implicitly defined. cases like 1) clock is going to D, RESET, ENABLE etc pins of flap 2) output ports 3) combinatorial inputs etc..
these all cases there is no use to balance the skew am i correct??So tool will only targets the DRVs means trans,cap and fanout. (SKEW and INSERTION DELAYS are IGNORED)
while doing the cts exclude pins (ignore pins) tool will implicitly defined. cases like 1) clock is going to D, RESET, ENABLE etc pins of flap 2) output ports 3) combinatorial inputs etc..
these all cases there is no use to balance the skew am i correct??So tool will only targets the DRVs means trans,cap and fanout. (SKEW and INSERTION DELAYS are IGNORED)
thanks pavan, yes you are right. I found out the answer to some other means also
To add to your points
Cases where the clock is getting divided by two / clock generator ciruits and as you said clock going to data all these places we need not check for skew . Thanks for superb answer
thanks pavan, yes you are right. I found out the answer to some other means also
To add to your points
Cases where the clock is getting divided by two / clock generator ciruits and as you said clock going to data all these places we need not check for skew . Thanks for superb answer
Cases where the clock is getting divided by two / clock generator circuit tool will balance the skew.In this case CP pin of the flop,tool can be define implicit NON STOP PIN.
Cases where the clock is getting divided by two / clock generator circuit tool will balance the skew.In this case CP pin of the flop,tool can be define implicit NON STOP PIN.