why do DFT no-timing simulations. As we have to do timing simulations anyway to check

[yakkala.srikanth]

We do no-timing simulation to verify patters before the sdf and post layout netlist are ready?
What are we verifying here? Patterns are generated by the tool. why do we nned verify them with the simulation tool again?

Why serial simulation is prefered compared to parallel simulation though it is faster. Other than the tester limitation is there any other limitation for doing parallel simulation?

Why we run simulations at slower freq in simulations. Is this too beacause of tester limitation?

why ac coverage is less than dc coverage/

What are the disadvantages of MBIST logic?

What exactly are we verifying by simulations? as both pattern generation and simulations are done on the same netlist?
when we get a simulation mismatch what does it mean?

A fault is detected on the tester. How to find the fault location from the mismatch?



Thanks
Srikanth

 

[maulin sheth]

We are doing simulations without timing to check that the pattern generated is properly working or not....
with timing simulation purpose is to check that SDF is proper or not means timing closure is working well or not...

After fabrication, design is working in serially so we are doing serial simulation, so we must have to do serial simulation.

 

[yakkala.srikanth]

Can you please answer other questions also.

 

[maulin sheth]

We are running simulations at slow frequency for only SA faults..for At speed testing, we require functional frequency...We are running simulation at lower frequency to reduce the power during testing..so that may damage the chip....

for finding the fault location, you require the depth knowledge of Scan Chain diagnosis...if you google it, you will find lots of material for Scan Chain diagnosis...

Can you tell me about the AC scan?

 

[yakkala.srikanth]

Hi maulin,

Thanks for the reply. AC means at-speed test only.

Can you please share what kind of issues you face during simulations other than setup issues?


Thanks
Srikanth

 

[maulin sheth]

We just need to debug it...if it is not the setup issue....that is only know by debugging experience....there are number of possibilities for any issue..may be design issue...or DFT related issue...we need to analyze it....

 

[yakkala.srikanth]

Thanks maulin sheth .