Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

who can tell me "what is Transition " ?

Status
Not open for further replies.

nine8

Member level 1
Joined
Sep 18, 2007
Messages
34
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,434
what is "Transition" in Asic ?
:D

什么是tansition ?嘿嘿,不知道有没有装中文的
 

Amruth

Member level 1
Joined
Oct 10, 2007
Messages
39
Helped
3
Reputation
6
Reaction score
1
Trophy points
1,288
Activity points
1,482
rising or falling time at o/p of a standered cell is called as Transition

i.e, load takes some time to charge or discharge right

i hope it will help you
 

vikas_lakhanpal27

Member level 1
Joined
Jan 16, 2008
Messages
39
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,522
Whenevera signal chages its value from '0' to '1' or '1' to '0' we call it as transition.
 

kelvin_sg

Advanced Member level 4
Joined
Aug 17, 2004
Messages
102
Helped
3
Reputation
6
Reaction score
3
Trophy points
1,298
Location
Singapore
Activity points
852
nine8 said:
what is "Transition" in Asic ?
:D

什么是tansition ?嘿嘿,不知道有没有装中文的

yup, when output signal changes, it goes a gradual rise/fall in analog domain..

如果没有读懂英文的话,芯片设计的软件很难用哟。:!:
 

nine8

Member level 1
Joined
Sep 18, 2007
Messages
34
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,434
Thank you , to:
Amruth , vikas_lakhanpal27, kelvin_sg

But i want to know if it must be considered,when doing synthesis with DC ? if does , By which factor is the "transiton" set ?

+++++++++++++++++++++++++++++
E文不怎么好,大家别笑我哈,中国人真多啊,呵呵,上回在论坛上还看到个用周星驰头像的朋友,挺搞笑的
 

Amruth

Member level 1
Joined
Oct 10, 2007
Messages
39
Helped
3
Reputation
6
Reaction score
1
Trophy points
1,288
Activity points
1,482
u r transition in the synthesis level is depends on the wire load models . i hope u know wat is wire load model.

wire load model is a timing model it depends upon the fanout
 

vinayshivakumar

Junior Member level 3
Joined
Dec 17, 2007
Messages
26
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,419
Transition should be set based on the library being used
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top