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sisching said:For the better matching, dummy is alway used.
where can the dummy connect to in order to avoid floating?
sisching said:thx
Actually i have the same idea with you
However, if i do so, other warning is appeared
ERC Warning: Gates connected to VDD/VCC
Can i neglect this warning.
pbs681 said:The most important one is gate connection. For NMOS you connect it to GND and PMOS to VDD. Thats mean your transistor is always off. No functional purpose.
iclayout1001 said:pbs681 said:The most important one is gate connection. For NMOS you connect it to GND and PMOS to VDD. Thats mean your transistor is always off. No functional purpose.
Can we connect the dummy transistor gate to the gate of the function transitors, while connect the source and drain of the dummy transistor to GND for NMOS dummy and VDD for PMOS dummy?
I think this will increase the capacitor of the function transistor gate terminal, is it acceptable?
pfd001 said:This dummy connection is dependant on your schematic? is it used for current mirror?
iclayout1001 said:In this case, the easiest way are to connet only one terminal (gate or drain) of the dummy transistor to VDD/VSS with topmost metal, while keep the other terminals connecting to the same terminal of the function transistors. But I'm not sure if it's OK or not.
If it's OK, which way is better, to connect the gate to VDD/VSS or to connect the drain to VDD/VSS?
Thanks in advance.