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What is wrong in this?

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triggerman

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I wrote this code.What i need to do is to insert 4 values at each clock which i store on a 2-dimensional array and i want to compute the sum of these values.

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;

ENTITY test IS

PORT( x1 : IN INTEGER RANGE 0 TO 255;
clk,load : IN STD_LOGIC;
output1 : out INTEGER RANGE 0 TO 1020);


END test;

ARCHITECTURE behavioral OF test IS

TYPE windows IS ARRAY(0 TO 1,0 to 1) OF INTEGER RANGE 0 TO 255;
BEGIN

PROCESS(clk,x1)


VARIABLE window : windows;
VARIABLE sum : INTEGER RANGE 0 TO 1020;

BEGIN
IF(clk'EVENT AND clk='1') THEN
IF(load='1') THEN
FOR i IN 0 TO 1 LOOP
FOR j IN 0 TO 1 LOOP
window(i,j):=x1;
sum:=sum+window(i,j);
END LOOP;
END LOOP;
END IF;
END IF;
output1<=sum;
END PROCESS;
END behavioral;

The code has no problem while compiling but in the simulation the results are wrong!!!.Please help.I set in the simulation for the x1 to take 2 values per clock but the result shows that something is wrong.
 

Hi

You can't store 4 values in just one clock the way you're doing. If you want to do that you have to do it in parallel, without cycle. Insted of:

FOR i IN 0 TO 1 LOOP
FOR j IN 0 TO 1 LOOP
window(i,j):=x1;
sum:=sum+window(i,j);
END LOOP;
END LOOP;

you should do something like this:

IF(clk'EVENT AND clk='1') THEN

window(0,0):=x1;
window(0,1):=x1;
window(1,0):=x1;
window(1,1):=x1;

sum:=sum+window(0,0)+window(0,1)+window(1,0)+window(1,1);

END IF;

This isn't C programming. You're dealing with hardware. When you use an instruction like "IF(clk'EVENT AND clk='1') THEN " it means the code inside will only execute once. A "for" executes several times, so if you place one inside a clk'Event you will introduce a contradiction in your code. Some compilers warn you of the error imediatly. others ignore it but then the results come out wrong.

You could do the same thing in several clocks, like if you were using a "for". You decide what's best.
 

Another thing that i want to ask is how to do this :
Imagine a 20x20 array with integer values from 0 to 255.
I want to separate this array in 25 arrays each of one 4x4 and compute the sum of each one of these arrays.So i think that the best way to implement this, is to insert one array(4x4) compute the sum of its values,then insert the next array do the same thing etc.Do you think that is the right way?I mean something like this

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;

ENTITY test IS

PORT( x1,x2,x3,x4,x5,x6,x7,x8,x9,x10,x11,x12,x13,x14,x15,x16 : IN INTEGER RANGE 0 TO 255;
clk,load : IN STD_LOGIC;
output : out INTEGER RANGE 0 TO 2040);


END test;

ARCHITECTURE behavioral OF test IS

TYPE filters1 IS ARRAY(0 TO 24) OF INTEGER RANGE 0 TO 2040;
TYPE filters2 IS ARRAY(0 TO 24) OF INTEGER RANGE 0 TO 2040;
signal fil1 : filters1;
signal fil2 : filters2;

BEGIN

PROCESS(clk)

variable count : integer:=(0);
variable sum1_or,sum2_or,sum3_or,sum4_or,sum1_kath,sum2_kath,sum3_kath,sum4_kath : integer range 0 to 1020;
variable filter1,filter2 : integer range 0 to 2040;


begin
IF(clk'EVENT AND clk='1') THEN
IF(load='1') THEN
IF(count<26) THEN
sum1_or := x1+x2+x3+x4;
sum2_or := x5+x6+x7+x8;
sum3_or := x9+x10+x11+x12;
sum4_or := x13+x14+x15+x16;

filter1:=(sum1_or+sum2_or)-(sum3_or+sum4_or);
fil1(count)<=filter1;

sum1_kath := x1+x5+x9+x13;
sum2_kath := x2+x6+x10+x14;
sum3_kath := x3+x7+x11+x15;
sum4_kath := x4+x8+x12+x16;

filter2:=(sum1_kath+sum2_kath)-(sum3_kath+sum4_kath);
fil2(count)<=filter2;
count:=count+1;
END IF;
END IF;
end if;
END PROCESS;
output<=fil1(0);
END behavioral;
 

Yes, I think your solution will work.

I can't guarantee your code is entirely right because it's difficult to analyse such a large code but it seems OK to me.
 

I am happy to hear that this will work from the point of the way of thinking.Maybe there are some syntactic errors.I just was wondering if there is a better way to do what i described in the previous post.Thank you very much
 

Yes there is.

You could separate your 20x20 array into 25 4x4 arrays and do all the sums in just ONE clock cycle. However this solution will require a LOT of hardware, especially adders. In your case you would need 25 times more adders with this solution.


Another option consists in a mid-term solution, doing some of this operations in parallel instead of doing them all. For example, you could perform operations on 5 4x4 arrays at the same time. It gives a nice boost to your performance without too much hardware.
 

Thanks for the quick response.Could you please give me an example to understand exactly what you mean?
 

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