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POR is probably schortage from Power-On Reset,. That means this block scould generate reset signal (which in most cases designer use for reseting flip-flops in digital part, but can be used for reseting integrators too), when your suply voltage rising from 0 to nominal value. This means that this signal become inactive after suply voltage reach some predefinied value. In company where I work we usualy build this blocks so that they generate this signal when suply voltage droping from nominal value to 0. Than the other treschhold voltage schould be smaler than first one so that this block has some histeresys. This make him resistable to suply noise.
LVD is probably schortage from Low Voltage Detector, which represent the block for monitoring the power suply voltage. This is important especialy for digital blocks. For example if suply voltage of one flip-flop drop under the minim value (which can cause improper function of this flip-flop) your system have to be capable of detecting such condition. I mean that this block is (usualy) used for detecting this negative peaks in suply voltage which are schort one. This peaks like I said can corrupt information stored in flip-flop and cause system crasch.