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What is POR and LVD in a chip ?

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alok_ky

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Can somebody tell as to what is POR and LVD in a chip ?


Plz describe in detail.
 

por and lvd

Hi

POR is probably schortage from Power-On Reset,. That means this block scould generate reset signal (which in most cases designer use for reseting flip-flops in digital part, but can be used for reseting integrators too), when your suply voltage rising from 0 to nominal value. This means that this signal become inactive after suply voltage reach some predefinied value. In company where I work we usualy build this blocks so that they generate this signal when suply voltage droping from nominal value to 0. Than the other treschhold voltage schould be smaler than first one so that this block has some histeresys. This make him resistable to suply noise.
LVD is probably schortage from Low Voltage Detector, which represent the block for monitoring the power suply voltage. This is important especialy for digital blocks. For example if suply voltage of one flip-flop drop under the minim value (which can cause improper function of this flip-flop) your system have to be capable of detecting such condition. I mean that this block is (usualy) used for detecting this negative peaks in suply voltage which are schort one. This peaks like I said can corrupt information stored in flip-flop and cause system crasch.
 

POR and LVD

What is the difference between POR and LVD ?

Any supporting documents ???
 

Re: POR and LVD

Hi

The main difference is the purpouse. LVD doesn't have to generate reset, it could be used just like information.
Design is not so much different.
Look this datascheets may be helpfull.

**broken link removed**
**broken link removed**
**broken link removed**

Pay atention on timings, and recomended aplications.

Regards
 

POR and LVD

Can somebody can upload some documents about the simpled POR circuit?
 

Re: POR and LVD

In IEEE study paper area search for "POR"
 

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