Is the LC VCO frequency in CADENCE LAYOUT and in the actual chip much different?

[mssong]

For RING VCOs in the GHZ range, I understand that the frequency is reduced a lot in actual chips due to issues like jitter between delay cells, etc.

I'm wondering if the LC vco in ghz is also affected by these issues in the actual chip as it goes through the process.
The impact of the PEX does reduce it a bit.