cczhangpjzj
Newbie level 4
For the purpose of digital low power design, foundry provide some standard cell called isolation cell.
I read there are quite a few different types like dual rail and single rail.
Is it possible somebody can provide some typical MOS schematic for isolation cell?
Just wondering exactly how this cell functions?
Thanks!
I read there are quite a few different types like dual rail and single rail.
Is it possible somebody can provide some typical MOS schematic for isolation cell?
Just wondering exactly how this cell functions?
Thanks!