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The routing problem is typically solved using a two step approach: Global Routing
• Define the routing regions.
• Generate a tentative route for each net.
• Each net is assigned to a set of routing regions.
• Does not specify the actual layout of wires.
• For each routing region, each net passing through that region is assigned particular routing tracks.
• Actual layout of wires gets fixed.
To perform wire routing, EDA tools divide a system-on-chip into grid cells or “g-cells”. These cells may also be called “bins” or “global routing tiles”. Each g-cell only accommodates a finite number of routing wires.