[SOLVED] what does Saturation region mean?

[alexyangfox]

Dear, all.

I don't quite understand what "Saturation" means for a BJT and a MOSFET.
So I Searched on the internet and wikipedia says,
"Saturated transistor, a BJT transistor or field-effect transistor that is fully turned on."
So I suppose that a fully turned ON transistor is saturated.

But then I met the problem below:


1.
let me say,it's an npn bjt.when the term,"turned on" ,is used , I think this means I should treat the npn bjt as a switch,and the switch is connected into a circuit .For the circuit ,it's a two-terminal device,and its two terminals are emitter and collector. At the same time ,the base terminal is a control terminal.

If the transistor is fully turned on , the resistor across the two terminals, the collector and the emitter , must be very small.
And in the Amplification region the resistor is very big , because the Curve is almost a horizontal line. ΔIc/ΔVbe is almost zero,and the reciprocal ,the resistor, is very big.

And in the left region, the Saturation Region,the Resistor is very small , and the term "Saturation Region"seems reasonable...


But for the NMOS case, I am so puzzled.

2. NMOS.
**broken link removed**

I treat the NMOS as a two terminal device in a circuit two.
The two terminals are the drain and the source.
And also the gate is for controlling the switch's operation.

When this Nmos is fully turned on , I suppose the resistor across the two terminals is very small too.
But when looking at the I-V curve, the region with the biggest resistors is called "Saturation Region."
I'm so puzzled..
Could anyone here help me with this problem...


Thanks in advance.

Regards.
Alex.

 

[LvW]

Hi Alex,

My first comment (answer) consists of a quote from the book "Microelectronic circuit design" (R.C.Jaeger):

It is important to note that the saturation region of the BJT does not correspond to the saturation region of the FET.
This unfortunate use of terms is historical in nature and something we just to have accept.

My second comment concerns the "resistor across the two terminals" (as mentioned by you).
By speaking of "high" and "low" you should consider that the transistor is a highly non-linear device.
That means: You always have to discriminate between the static (dc) resistance and the dynamic (ac) resistance.
Example: The Ic-vs-Vce curve is nearly horizontal and ,hence, the ac resistance is rather large. However, the dc resistance can be medium or even rather small (depending on the selected bias point).

LvW

---------- Post added at 14:46 ---------- Previous post was at 13:50 ----------

Supplement: Alex, to explain the different "saturation" definitions you only have to ask: Who is saturated and why?
* BJT: Ic is saturated (that means: remains nearly constant) if Vbe resp.Ib exceeds a certain limit.
* FET: Id is "saturated" if Vds exceeds a certain limit (approx. pinch-off voltage) for Vgs constant.

 

[alexyangfox]

Hi Alex,

My first comment (answer) consists of a quote from the book "Microelectronic circuit design" (R.C.Jaeger):

It is important to note that the saturation region of the BJT does not correspond to the saturation region of the FET.
This unfortunate use of terms is historical in nature and something we just to have accept.

My second comment concerns the "resistor across the two terminals" (as mentioned by you).
By speaking of "high" and "low" you should consider that the transistor is a highly non-linear device.
That means: You always have to discriminate between the static (dc) resistance and the dynamic (ac) resistance.
Example: The Ic-vs-Vce curve is nearly horizontal and ,hence, the ac resistance is rather large. However, the dc resistance can be medium or even rather small (depending on the selected bias point).

LvW

---------- Post added at 14:46 ---------- Previous post was at 13:50 ----------

Supplement: Alex, to explain the different "saturation" definitions you only have to ask: Who is saturated and why?
* BJT: Ic is saturated (that means: remains nearly constant) if Vbe resp.Ib exceeds a certain limit.
* FET: Id is "saturated" if Vds exceeds a certain limit (approx. pinch-off voltage) for Vgs constant.

dear LvW,
thank you very much .
It's very kind of you .
Your second comment is very helpful.
As for the DC operation , the resistance has something to do with the exact point rather than the derivative.

And thank you for the supplement too.
Actually I know the fact in this aspect, but I just don't like this explanation.
It's not symmetric , it's not beautiful.
So I came here to see whether there's another explanations.

You first Comment answered my question.

thanks.
Regards.
Alex.

 

[erikl]

... but I just don't like this explanation.
It's not symmetric , it's not beautiful.
So I came here to see whether there's another explanations.

My explanation -- or rather: memory hook -- is

* BJT: saturation exists whenever Ic/Ib > B , i.e. "DC gain is satisfied" -------------- wrong

* BJT: saturation exists whenever Ic/Ib < B , i.e. "DC gain is satisfied" -------------- corrected, s. below
* FET: saturation exists whenever Vds > Vgs , i.e. "Id is satisfied"

 

[LvW]

...........
* BJT: saturation exists whenever Ic/Ib > B , i.e. "DC gain is satisfied"
...............

Erik, can you explain this?

 

[erikl]

Erik, can you explain this?

You're right, I should have written Ic/Ib < B , and explained "whenever the actual (i.e. used) DC current gain is less than the possible (or data sheet stated) current gain".

Thanks to indicate this to me!

 

[LvW]

You're right, I should have written Ic/Ib < B , and explained "whenever the actual (i.e. used) DC current gain is less than the possible (or data sheet stated) current gain".
Thanks to indicate this to me!

Erik, sorry, but I have to ask again: can you explain/justify this statement? What is the source of this "definition"?

 

[erikl]

I thought it would be clear, sorry, LvW.

Whenever I want to operate a BJT in saturation region (switching application) -- in order to minimize its V_ce or power consumption loss during switched "on" condition -- I should grant it more base current (I_b) than necessary corresponding to its min. dataSheet B(I_c) value. Hence the actual I_c/I_b < B_min(I_c) from the dataSheet.

 

[LvW]

Erik, sorry.
I am the victim of the different definitions for BJT and FET. You are right - it corresponds with my own posting #2.
Thank you.