[SOLVED] Voltage reference design, a supply independents issue

[vadim888]

Hi all again,

I'm designing a voltage reference for 28 nm technology, and I'm facing one issue. I can not get a stable Vref (see picture) with supply sweep.



Schematic>



Any comments how I can overcome that issue? Or where I can find a solution?

Best,
Vadim

 

[dick_freebird]

First, check that the op amp output is trying to do the
right thing. Startup is a potential issue, so is swapping
phase on the feedback.

Next check that for any decent gate drive, the PMOS
current sources are capable of pushing the needed
current onto the various reference elements. Low
value resistor shunts may make booting up impossible.
Make sure op amp input common mode range includes
ground, with substantial (if not near-peak) AVOL there.