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7 segment display circuit issue.

fawadbutt

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hi, all i need some suggestion about 7 segment display. i make circuit its work fine but for some time its start dim some segment and in the end its damege.
i share schmetic diagram diagram i operate with arduino.
i use 10k resistence on pnp transistr base and 10R on digit comman point.

Screenshot 2024-01-16 134619.png
 
Hi,

it´s all about specification ... and quality.

For sure if you buy cheap crap or from unreliable sources .. no datasheet and no one of us can help.

But if you use good quality parts, then the datasheet is the source of information you need to consult.
You don´t provide links to datasheets, nor do you provide the exact part names. I don´t want to spend the time to search the internet .. to maybe find a different one (part, datasheet, vendor..) that you use.
It´s the job of every designer to read the datasheet and to check/ensure that the parts are operated properly.
I think it´s on you to make helping focussed and easy.

its work fine but for some time its start dim some segment and in the end its damege
Random segments or always the same segments? (I would not be surprised if it´s mainly segments B and C)

"I operate with Arduino" .. says nothing at all. With Arduino you could just mean the IDE, maybe arduino hardware, maybe second source Arduino (compatible??) hardware. .. or anything else. It does not say anything about signal voltages, code, timing, specifications ... one can validate.

We don´t know what knowledgle level you have, what measurement tools you have, whether you have done some debugging.
Also
****
Your schematic. Is not very detailed.
* power supply: We don´t see any. We don´t know how clean your supplies are.
* also power supply: I don´t see any power supply decoupling capacitors. My opinion: a circuit without capacitors is no reliably working circuit.
* we see no individual segment_current limit (resistors). Whether this reliably works or not depends on multiplexing method.
* ESD: we don´t know if there is an ESD problem. ... during assembling and during operation.
* PCB layout. Every time you switch OFF some current there is a risk for a current spike. Depending on switching speed, stray inductance, protection ...
* also we don´t see signals and their timing.

Klaus
 
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"Normally" one places a PNP switch with no R in it collector, direct connection
to common anode of a digit when driving off same supply as digital output to
display. In this case you have 14 V on emitters of PNPs so you need base Rs to
limit current flowing thru ULN2003 darlington. But you also need a R from PNP
base to+14 to insure digit gets shutoff when 2003 output is off. That R needs
to absorb leakage with a value that would limit V << .7V to insure PNP is off
when darlington is off. The ULN2003A cutoff current is max 500 uA. So
R = .7V / .0005 = ~ 1.4K, so for margin use 1/2 that or ~ 700 ohms. Note you
now have a V divider driving base of PNP, eg. less on V, but should be ok.

To limit current you dont place R in PNP collector, as that would change current
thru segments as the # segments on changes. You place R in series with each
segment.

1705405994841.png


You would adjust values per your goal segment current. Also adjust R3 to
insure PNP gets saturated, your Ib of PNP =~ (Iled_segment * 7 segments ) / 10.


Regards, Dana.
 
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Root Cause Failure Analysis
  1. Dim display is when the uC is off but pulling down the 12V digit driver
  2. Burnt out segment is when the uC stops multiplexing at 25% duty cycle and you are now driving a segment at 4 times the average current.

Too many design failures:
  1. No design specs. Arbitrary wrong choices.
  2. Wrong supply voltage.
    1. You do not use 12V and pullup 1mA to the output of a CMOS uC.
    2. Use Common Cathode (CC) instead of Common Anode (CA) display
      1. CC uses a low side digit MUX switch
      2. A Digit switch can handle more than all the segments at max current for LED
      3. Use a low Vce(sat) NPN, Nch FET, NMOS 500mA version of the ULN200x theme
      4. Use the same Vdd 3.3 or 5V or ? as uC unless design specs have a good reason.
    3. Using 12V to power 4 digits Mux'd at 4 times the average current using 55mm RED 2.4V LEDs will continue to burn out displays.
  3. No segment constant current limiter
Recommendations

1. Never design withou
t "Top-Down" design specs even if you want to do "bottoms-up" component pre-selection (e.g.) wrong V+ and CA
This is a common flaw perhaps not stressed by Profs who lack industry experience. So do not feel alone.
2. Observe all absolute maximums in datasheets include overvoltage of CMOS outputs, and LED currents
2. Never design to absolute maximum specs without understanding the consequences on heat rise & MTBF and ensure margins for worst case tolerances.
3. Consider a tinted film overlay to improve visual contrast ratio, so you do not need absolute max when Muxing
4. if using a uC with lower voltage than peripherals, consider power sequence for level shifter effects on CMOS SCR failures. (SCR Latchup effects)
 
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The ULN2003A output is pulled up to 14V, not the processor. Per
OP's schematic.

Regards, Dana.
 
The ULN2003A output is pulled up to 14V, not the processor. Per
OP's schematic.

Regards, Dana.
Thanks Dana

My main points should be 12V is inefficient. 3.3V would be optimal yet Arduino uses 5V to maximize for speed but could be mod'd for 3.3V

Design Rules
  1. You never choose R to current limit digits as digit current varies.
  2. You always limit segment current as only one digit and one load is on at a time.
  3. If you mux 4 digits you must expect < 25% of average brightness due to duty factor.. generally you can't do more than 4 LED digits due to these rules unless it's special design and low ambient.
  4. Consider display drivers with CV digit switches and CC segment drivers.
 
@3.3V not much headroom left for driving and adequate tolerance on
segment current. And variability digit to digit brightness. Limited to red
digits....? Green, blue, white out of the question. Of course a fix for red
thru yellow would be low Rdson logic level fets. For sure you tradeoff
power versus optical characteristics.

5V maybe a better environment.


Regards, Dana.
 
What is headroom for CA RED at 3.3V? yes tight for poor quality Red displays with high Vf specs.

Continuous Forward Current : 20mA
Average Forward Voltage : 2V
Power Consumption : 36mW
Ref

Allow 0.1V drop for 640 mA digit at 25% d.f. or logic level type Pch RdsOn < 100/640<= 150 mohm

These ought to be rated at ;
Vf =2.1V +/-0.3 @ 20 mA continuous
Peak Forward Current IF(Peak) 100 mA to 180 mA depending on source

For this 0.56" Red from Kingsbrite

1705416122233.png


Most CC limiters using BJT's need 1V headroom or more (Vbe+ VCe(sat).

With some gain and negative FB you can prebias the Vbe current sensor for < 100 mV drop for CC segment drivers.
Thus Vdd - Vfet-Vcc - %tol = 3.3 - 0.1-0.1-0.1 = 3.0V allocated for 2V RED LED segment at 80 mA

Rule of Thumb

Most Vf variations for any given p/n of diode are due to Rs bulk resistance and thermal voltage shift for a given current.
This means you can estimate variance if you know range of Rs which can be screen for high volume users. ( such as my former clients who I sold about 1m pcs in 10 yrs.) screened for 7%Vf vs usual 40% with best quality brightness.
 
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HP9825 LEDs.jpg

Some might wonder if you can't mux many LEDs due to fuse current limits to anode, How the heck did HP get so many digits in 1975 and release in 1977 with the HP9825. (my 1st personal computer) ok HPbasic may be primitive... but not with a rack of peripherals.
HP9825 rack.jpg
 
Where do your 14V come from? I see 12V only
Where does the 500uA cutoff current come from? I see 100uA only.

Maybe I´m looking into wrong informations/datasheets.

Klaus
My error. should be 12V.

ULN2003A collector cutoff :

1705421063310.png



Regards, Dana.
 
You must limit segment current to 80 mA to prevent 85mW max / segment worst case @ 25% d.f.
I computed some potential tolerances, in absence of your specs.

sample LED
1705427709089.png


Engineering Change Order ( pretend)

  1. Cut 12V, replace with 5V
  2. Remove/bypass Rd on Anode
  3. Insert Rs on collector to each segment
  4. I suggest 18.5 ohms +/30% selection range, 1/4W

1705429592502.png



My simulation design
--- Updated ---

Must be me but something does not add up here :

View attachment 187968

View attachment 187969

View attachment 187971

Regards, Dana.
ULN2004 versions on right use 2 test conditions; Input open and 6V which does not apply to left '2003
But if input is 6V the collector will be saturated not cut-off from the input. hmm?
So what is Vce in Fig 7.2? (besides does not apply)
1705430863495.png


? the voltage at some saturated current sink voltage rating??
so 500 uA is what Vce?
But then that is not cutoff.

So maybe this is this supposed to say something about current sharing with one in parallel ON and the other OFF leaking?
Rather lean on info.
 
Last edited:
What is headroom for CA RED at 3.3V? yes tight for poor quality Red displays with high Vf specs.

Continuous Forward Current : 20mA
Average Forward Voltage : 2V
Power Consumption : 36mW
Ref

Allow 0.1V drop for 640 mA digit at 25% d.f. or logic level type Pch RdsOn < 100/640<= 150 mohm

These ought to be rated at ;
Vf =2.1V +/-0.3 @ 20 mA continuous
Peak Forward Current IF(Peak) 100 mA to 180 mA depending on source

For this 0.56" Red from Kingsbrite

View attachment 187962

Most CC limiters using BJT's need 1V headroom or more (Vbe+ VCe(sat).

With some gain and negative FB you can prebias the Vbe current sensor for < 100 mV drop for CC segment drivers.
Thus Vdd - Vfet-Vcc - %tol = 3.3 - 0.1-0.1-0.1 = 3.0V allocated for 2V RED LED segment at 80 mA

Rule of Thumb
Most Vf variations for any given p/n of diode are due to Rs bulk resistance and thermal voltage shift for a given current.
This means you can estimate variance if you know range of Rs which can be screen for high volume users. ( such as my former clients who I sold about 1m pcs in 10 yrs.) screened for 7%Vf vs usual 40% with best quality brightness.
Of course the worst case Vf is 2.35 at 10 mA, 25C, right in the ballpark for red.

Excellent analysis but limited by typical graph computation and interpretation. In my opinion one
of the shortcomings in our industry that is what we are left o work with.

Pd is 75 mW at 25 C..... Your 85 mW is what you backed into....? Is there any effect on reliability
on transient power or avg power is good to go ?

Optical datasheets have been the bane of us in terms of completeness. Industry
still evolving.



Regards, Dana.
 
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hi to all for usefull discution.
in this discsstion i undersand some points. which i going to use.
1- its better to use CC digit rather then CA.
2- for driving CC digit to i going to use NPN transistor (BD139)
3- remove collector resistence and use 500R (470R) on each segment for 20mA and 2Vf .
Screenshot 2024-01-17 132544.png

npn transitor drive direct with uC,
Screenshot 2024-01-17 150444.png
 
Generally speaking to sat the digit drive transistor you want Ib =~ Ic / 10.

So if worst case (you should compute that) if Ic = (7 segs x 20 mA ) / 10 = 14 mA.

And follow Tonys calculations for power considerations.


Regards, Dana.
 
Use CA, You will need fewer P type power switches. i.e. do not use NPN BD135
Digit drivers are NOT CC they must switch to Vdd within 0.1V with all segments ON.
Do not use 12V for 7seg LED drivers or consider thermal issues dumping extra watts . If you have 5V , use it.
If you use 3.V uC then you need a level shifter for 5V then a driver.
Why 2Vf?

CA PNP driver example

e.g. https://www.digikey.ca/en/products/detail/nexperia-usa-inc/PHPT61003PYX/4725726

1705510593512.png


Are you using ESP32 3.3V? This is important to say

Can you choose SMD parts? ditto...
 
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