matlabprob
Newbie level 3
pmos voltage follower
I have voltage follower with two PMOS transistors in series.
constant DC voltage is given to the gate of 1 transistor and input is give to the gate of other transistor and is biased with VDD(3.5V) and VSS(gnd).
When I simulated this circuit in the cadence for input Vsin(±1V AC and 1V Amplitude)
I am getting an output starting at 1.6V and following the input signal . i.e AC voltage difference is zero.
Can anyone tell why the output is 1.6V higher than the input.
I have voltage follower with two PMOS transistors in series.
constant DC voltage is given to the gate of 1 transistor and input is give to the gate of other transistor and is biased with VDD(3.5V) and VSS(gnd).
When I simulated this circuit in the cadence for input Vsin(±1V AC and 1V Amplitude)
I am getting an output starting at 1.6V and following the input signal . i.e AC voltage difference is zero.
Can anyone tell why the output is 1.6V higher than the input.