VHDLCode for a controller to navigate a robo on a Uniform plane ( using three points

[abhijeet.kumar]

Dear sir
This is my code for providing motion to a robo on a uniform plane .designed using three points.I have only two errors please help me & rectify my errors.Errors & coding are given below.
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ERRORS
ERROR:HDLCompiler:1638 - "C:\Users\dell\Desktop\vhdl\RFID2\iseconfig\HANMAN2\ROBO.vhd" Line 119: found '0' definitions of operator "=", cannot determine exact overloaded matching definition for "="
ERROR:HDLCompiler:854 - "C:\Users\dell\Desktop\vhdl\RFID2\iseconfig\HANMAN2\ROBO.vhd" Line 60: Unit <behavioral> ignored due to previous errors.

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VHDL CODE
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Code VHDL - [expand]
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
package controler is
constant rng_row : integer:= 2;
constant rng_clmn : integer:= 2;
constant gps_row : integer:= 2;
constant gps_clmn,lut_clmn: integer:= 2;
constant lut_row : integer:=7;
Type lut_datain is array (0 to lut_row,0 to lut_clmn)of std_logic;
signal temp3:lut_datain;
Type gps_datain is array (0 to gps_row,0 to gps_clmn) of std_logic;
Type rng_datain is array (0 to gps_row,0 to gps_clmn) of std_logic; 
-----Type rng_datain is array (0 to rng_row,0 to rng_clmn )of std_logic;
-----signal temp5:gps_datain; ---array (0 to rng_row, 0 to rng_clmn);
end controler;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use WORK.controler.ALL;
 
entity ROBO is
port (clk: in std_logic;
       x1,x2,x3,x4,x5,y1,y2,y3,z1,z2,z3: inout std_logic;
       df_in1,df_in2:in gps_datain;
         df_in3:in lut_datain; -- in array (0 to rng_row,0 to rng_clmn);
         df_out1,df_out2:inout gps_datain;
         df_out3: out lut_datain;
         mc_in1: in gps_datain;
         mc_in2: in rng_datain;
         mc_out1: inout gps_datain;
         mc_out2: inout rng_datain;
         mcomp_out,dcomp_out:out std_logic);
end ROBO;
architecture Behavioral of ROBO is
--Type gps_datain is array (0 to gps_row,0 to gps_clmn) of std_logic;
signal temp1,temp2: gps_datain ;
signal temp5:gps_datain; 
variable gps_data:gps_datain:=
((x1, y1, z1), 
 (x2, y2, z2), 
 (x3, y3, z3));
--------Type rng_datain is array (0 to rng_raw,0 to rng_clmn )of std_logic;
signal temp4:rng_datain; 
variable rng_data:rng_datain:=
((x1, y1, z1), 
 (x2, y2, z2), 
 (x3, y3, z3));
SIGNAL i : integer := 0;
begin
-----------------------------------------for direction finder----------------------------------------------------
p1:process(clk)
type lut_datain is array (0 to lut_row,0 to lut_clmn)of std_logic;
constant lut_data:lut_datain:=(
('0','0','0'),
('0','0','1'),
('0','1','0'),
('0','1','1'),
('1','0','0'),
('1','0','1'),
('1','1','0'),
('1','1','1'));
begin
if ( clk = '1' and clk'event)then
for i in 0 to 5 loop
 case i is 
 when 0 => temp1<= df_in1;
 when 1 => df_out1<= temp1;
 when 2 => temp2<= df_in2;
 when 3 => df_out2 <= temp2; 
 when 4 => temp3 <= df_in3;
 when 5 => df_out3<= temp3;
 end case;
 end loop;
  if (df_out1 = df_out2 and df_out1 = df_out2) then
  dcomp_out <= '1';
  else
  dcomp_out <= '0';
  end if;
end if;
end process;
--------------------------for motion control---------------------------------------------- 
p2:process(clk)
begin
if (clk'event and clk = '1')then
 for i in 0 to 3 loop
  case i is 
  when 0 => temp5 <= mc_in1;
  when 1 => mc_out1 <= temp5;
  when 2 => temp4 <= mc_in2;
  when 3 => mc_out2 <= temp4;
  end case;
      if (mc_out1 = mc_out2) then
          mcomp_out <= '1';
      else
      mcomp_out <= '0';
      end if;
    end loop;   
 end if;
 end process;
end Behavioral;

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[barry]

My guess (just a guess) is the line : "if(mc_out1=mc_out2)...

I don't know if you can do that with types inout.

 

[abhijeet.kumar]

please frendz help.......reply soon