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[SOLVED] Designing a clock tree: looking for Integer-N PLLs / Buffers

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Newbie level 6
Feb 1, 2024
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Hi all,

I am designing a clock tree / distribution network for my device, which has various clocking needs, and requires a stable, phase synchronous clock tree throughout the whole system for the following frequencies:

* 30.72 MHz
* 25.0 MHz
* 24.0 MHz

For that, I've designed the clock tree like this:

1. Clock source: TCXO at 38.4 MHz with 0.5ppm over -40 to +85°C (using Epson TG2016SMN 38.4000M-MCGNNM0)
2. /5 x 4 == 30.72MHz => 1x single-ended 50R
3. /192 (/64/3) x 125 == 25.00 MHz => 2x single-ended 50R
4. /8 x 5 == 24.00 MHz => 3x single-ended 50R

For mere 1:1 buffering as well as proper forming of the clipped-sine-wave output of the TCXO into LVCMOS (at 3.3V) I have identified the following chip as suitable:

Renesas 5PB1216 (a 2.5 V to 3.3 V 1:6 TCXO / LVCMOS High-Performance Clock Buffer)

My questions:

a) Anything wrong "in principle / general" with my clock tree design?
b) What I am missing is a simple solution for the integer multiplications/divisions that retains the clock stability, phase synchronicity and low phase noise.

I would be grateful for any tips or hints, in general, and specifically rgd suitable chips! A simple and cost effective solution .. I definitely would like to avoid adding "complex" things like an FPGA if possible.

Thanks a lot and kind regards,


PS: I am actually a software engineer. And new to hardware. I am way out of my "normal" world, so please be gentle and forgiving with me. Your Karma will be happy, promise;)

The 4046 IC is popular for PLL. I doubt it works at the high frequencies you specify.
But it may be a lead to what you want.
This link shows how it multiplies x 10, with the help of 4017 (which can divide by ten or any lesser number). Many counter chips divide by various integers. Example, 7490.

Project article:


what about TI´s CDCE9xx series, like CDCE913


thank you both a lot for your comments!

funny enough, after spending last night learning and skimming distributors and through tons of datasheets, I basically arrived at almost the same chip as @KlausST suggested, just a variant, as I need 3 PLLs in the clock synthesizer:

Texas Instruments CDCE937

so I'm really glad for this tip, I'm a SW eng., so highly appreciated!



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