VHDL persists in (US domestic) military and government uses,
and academia, but commercial has pretty much gone to verilog
(and veriloga, is much better supported in mixed signal simulators
than any sort of vhdl based equivalent, if indeed any exist).
I'd say to keep what you learn about style, and plan on picking
up the veriloga syntax & tools for the future. Because the tool
set you will use (for any but the independent designer) is the
employer's choice, not yours, and employers tend to choose
the leading tool vendors' packages (commercial, supported)
and therefore a job in industry will put you on that horse.