modulo operator in vhdl

[mdreus]

I want to do a calculation of the mod operator in vhdl for modules (2^n)-1, (2^n)+1 and for modules (2^n)+k and (2^n)-k for k=3, 5, 11, 21, 85, 341, etc. The operations would be f = (X*Y) mod ((2^n)-1) for example.

For example for n=8 bits it worked, but for bits equal to or above 16 bits it doesn't work, can anyone tell me why it doesn't work and how to improve my code to make it work.

My code for n = 8 bits, module 255

library IEEE;
use IEEE.numeric_std.all;
use ieee.std_logic_1164.all;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity top is
port(
R0 : out integer range 0 to 254;
Y : in integer range 0 to 254;
X : in integer range 0 to 254);

end top;
architecture structural of top is
begin
R0 <= (X * Y) mod 255;
end structural;

My code for n = 16 bits, module 65535

library IEEE;
use IEEE.numeric_std.all;
use ieee.std_logic_1164.all;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity top is
port(
R0 : out integer range 0 to 65534;
Y : in integer range 0 to 65534;
X : in integer range 0 to 65534);

end top;

architecture structural of top is
begin
R0 <= (X * Y) mod 65535;
end structural;

n = 8 bits, (254 * 253) mod 255 = 2 right
n = 16 bits, (65534 * 65533) mod 65535 = 1 wrong, it was supposed to give 2

 

[FvM]

Not surprizing, 65634*65533 exceeds standard integer range of -2^31 .. 2^31-1.

 

[mdreus]

Not surprizing, 65634*65533 exceeds standard integer range of -2^31 .. 2^31-1.

Is there another way to do it? std logic vector does not work

 

[barry]

You could use UNSIGNED.