verilog program of reconfigurable johnson counter

[jincyjohnson]

can you give me the verilog code of reconfigurable johnson counter.ie; there are two external inputs-mode and init.when mode=0,it works as a johnson counter.when mde=1 & init=0, it should reset. when mode=1 & init=1,it works as a ring counter.actually i initialize all the flip flops output first.but only johnson counter and reset works, ring counter doen't work.in ring counter mode the output is all zeros .can u give me the verlog code

 

[mrflibble]

How about you put in some time and try it first. When you're stuck show your code + explain where you are stuck.

 

[jincyjohnson]

here i attach code and block diagram.in ring counter mode, output are zeros

 

[mrflibble]

Okay, that's a good start. Do you have a testbench + testbench results to go with that? Oh and it's probably easier if you post the code using [code] tags (instead of attaching a pdf with verilog code in it). Also see this one for a quick description:

 

[jincyjohnson]

---

Code Verilog - [expand]
1
[syntax=verilog]

---

[/syntax]

module johnson(clk,rst,init,rjmode,q);
input clk,rst,rjmode,init;
parameter n=5;
output [n-1:0]q;
reg [n-1:0]q_i;
reg temp;
integer I;
always @(posedge clk or negedge rst)
begin
if(!rst)
for(I=0; I<=n-1; I=I+1)
q_i <= 1'b0;
else
begin

if (!rjmode)

temp = ~q_i[n-1];
else 
temp = (q_i[n-1]) &&(init);

for(I=n-1;I>=1; I=I-1)
begin
q_i[I] = q_i[I-1];
end
q_i[0] = temp;

end
end
assign q = q_i;
endmodule

 

[mrflibble]

Thanks for the code in post. but also ...

Do you have a testbench + testbench results to go with that?

With a testbench we have some idea of how you test your design.

 

[jincyjohnson]

can you give me the test bench code for the program.how can we write test bench for a program with 'for loop'

 

[mrflibble]

Usually the idea is that you write the testbench for your design.

If you don't know how to, you can use this tutorial: https://www.asic-world.com/verilog/art_testbench_writing.html

 

[tollinjose]

Do a comparison with VHDL code. I helps to you to understand an architectural view. https://vhsichdl.blogspot.in/2013/04/vhdl-code-for-johnson-counter.html

 

[ads-ee]

Do a comparison with VHDL code. I helps to you to understand an architectural view. https://vhsichdl.blogspot.in/2013/04/vhdl-code-for-johnson-counter.html

To understand the architecture of a Johnson counter I think the OP would be better off looking at this page: https://electronics-course.com/johnson-counter as opposed to reading a VHDL description of a Johnson counter.