Continue to Site

Welcome to

Welcome to our site! is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Verilog-A Voltage Controlled Resistor

Not open for further replies.


Member level 2
Oct 25, 2016
Reaction score
Trophy points
Activity points

I am trying to create a voltage controlled resistor in Verilog-A with the following behavior:

if V(res) <= 0.3 resistance = 5k;
if V(res) >0.3 && V(res) < 0.5 resistance = 2k;
if V(res) >= 0.5 resistance = 10k;

I haven't been able to get this to work.

I can't get the second part to work at all.
For the first and third part, I can't get it to transition from sharply and very close to the thresholds.

Here is my code:

module vcr_model (p, n);
inout p,n;
electrical p, n;

analog begin
  if (V(p,n) <= 0.300 ) res=5k;
  if ((V(p,n) > 0.3) && (V(p,n) < 0.5)) res=2k;
  if (V(p,n) >= 0.5) res=10k;

analog begin
  V(p,n) <+ I(p,n)*res;


I am aware that it is possible to use SPICE E-elements to do this but I really need to get this working under Verilog-A.

Thanks for any help in getting this to work using Verilog-A!
Last edited by a moderator:

I do not see the "res" parameter declared, as so:

parameter real res = 5000;

nor are p, n declared as "voltage":

voltage n, p;

after the input and output declarations.

I notice that in my stash of veriloga models, assignment
puts spaces between arguments and operators, like so:

if (vout > vout_max) vout = vout_max;

I don't know whether these would provoke the errors (which
aren't shown) or are just "style".

You might like to sprinkle some print statements in there
at locations where you expect "something" to happen,
so you can see whether it does.

You might find it helpful to get V(p,n) into a variable first,
just in case referring to the input quantities in math ops
doesn't work the way you think, and get the current into
a variable before stuffing <+I(p,n) to the pins. Baby steps that
can be checked by printing their value.


Honestly I don't have any experience with Verilog A.
But you say there is a problem with the second line.

Thus I put myself into "parser mode" ;-) .. and tell what I see:

First and third lines are in this style:
* if (condition) then ..
But second line is
* if (condition) then && ( ....
Thus I'd try to add brackets around the whole condition, to make it clear for the parser where the condition ends.
In this style
* if ( condition1 && condition2) then ...

Btw: the resistance vs voltage is: 5k | 2k | 10k. So it's not continously rising nor falling.
Just confirm that this is what you want to achieve.


I am not a big fan of VA, however as I remember you should have only one analog block, while you have two.
Another thing is implementation. You want to control the resistance by voltage on it, so you should defined current on terminals. So, the last line should be like:
I(P, N) <+V(P, N) /res

Not open for further replies.

Part and Inventory Search

Welcome to