[SOLVED] Using VCS to compile SV filel ist

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meir

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I'm trying to run command: vcs -sverilog -f filelist
but I get the error : No source file given.
When I run the same command but with a file list of only verilog files
it compiles succesfully.
what am I doing wrong ?
Thanks
 

Can you show the complete command line and the error message? Does the message report a problem on the filelist or a source file included in the filelist? Are you using any environment variables in the filelist?
 
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    meir

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try this

vcs -R -I -f filelist +v2k +systemverilogext+.sv
 
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    meir

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I found the problem, should have read the Error message more carefully:
Error-[NSFG] No source file given
Source file is not being with compilation option '-f'.
Please check file list and note '//' is used for comment.

The problem was that in the full path I had '//': /dir1/dir2//dir3/file.sv.
 

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