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don't you think using parameter - for FSM - for example will force the synthesis tool to encode your state control to the one you wrote in your parameter definition even if was not the optimum technique for FSM state encoding ?, i mean you just use parameter - usually in FSM - to make your code readable , I agree with that , but look to the other side .. what do you think
Parameters can be used in FSMs compared to `define. Say, if states like idle, read, write are declared using `define and if the design contains multiple FSMs, it might be difficult to debug the design. Here parameters come in handy.