olajide85
Newbie level 5
I have been having issue on testing this code on the altera board. ths code is meant to convert 5oMHz to 1Hz. after testing it on the board, I discovered it is nopt working on the altera board. I need help on this. this is the code. I will appreciate your urgent response.
ENTITY FDIVIDER IS
-- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
PORT
(
clk : IN STD_LOGIC;
clkout : OUT STD_LOGIC
);
-- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
END FDIVIDER;
-- Architecture Body
ARCHITECTURE FDIVIDER_architecture OF FDIVIDER IS
BEGIN
PROCESS (clk)
VARIABLE count : INTEGER RANGE 0 TO 25000000;
BEGIN
if(clk'event and clk='1') then
if(count=25000000)then
count:=0;
clkout<='0';
else
count := count+1;
clkout<='1';
END IF;
END IF;
END PROCESS;
END FDIVIDER_architecture;
ENTITY FDIVIDER IS
-- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
PORT
(
clk : IN STD_LOGIC;
clkout : OUT STD_LOGIC
);
-- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
END FDIVIDER;
-- Architecture Body
ARCHITECTURE FDIVIDER_architecture OF FDIVIDER IS
BEGIN
PROCESS (clk)
VARIABLE count : INTEGER RANGE 0 TO 25000000;
BEGIN
if(clk'event and clk='1') then
if(count=25000000)then
count:=0;
clkout<='0';
else
count := count+1;
clkout<='1';
END IF;
END IF;
END PROCESS;
END FDIVIDER_architecture;