Frequency counter and displaying output in 3 BCD outputs

[john_cooper]

Hello all

I'm new to VHDL. I want to design a frequency counter and stuck up at thinking about the implementation. Can anyone of you redirect me to a source to see the implemetation?

The problem statement is as follows
One design scheme is to count the number of transitions in the input signal within the
1-second period. Following are the assumptions and specifications:
 The system clock is 1 KHz.
 The frequency range of the input signal is between 1 Hz and 500 Hz.
 The measured frequency is 3 BCD digits.
 There is a control signal, start. When it is asserted, the frequency counter takes one
measurement. The result stays on the output until the next measurement.
 The entire design must be synchronous (i.e., all memory elements driven by the same
system clock signal).

 

[KlausST]

Hi,

This sounds like homework. (It makes no sense that we do your homework. But we will help you to rectify mistakes)
Similar questions have been discussed earlier in this forum.
So do a forum search to get ideas (this is how a forum is meant)

The key tasks are:
* To divide the big task into smaller tasks
* you should have an idea how to solve the smaller tasks.
* maybe it's necessary or useful to divide the smaller tasks in even smaller tasks.
* write down your ideas - I often use pencil and paper for this

Then show us what you have done so far.
Then ask elaborated questions. Max three per post.

Klaus

 

[john_cooper]

Hi,

This sounds like homework. (It makes no sense that we do your homework. But we will help you to rectify mistakes)
Similar questions have been discussed earlier in this forum.
So do a forum search to get ideas (this is how a forum is meant)

The key tasks are:
* To divide the big task into smaller tasks
* you should have an idea how to solve the smaller tasks.
* maybe it's necessary or useful to divide the smaller tasks in even smaller tasks.
* write down your ideas - I often use pencil and paper for this

Then show us what you have done so far.
Then ask elaborated questions. Max three per post.

Klaus

I decided to split in modules. One to start a period counter , second is binary to bcd converter and third is frequency calculator . Then instantiate them in top and have a master fsm

 

[KlausST]

Hi,

Just one line of text. No drawing?
is this all that you can provide?

We won´t do drawings before you show your first drawing.
We don´t write code for you, we help you to correct the code you have written.

Klaus