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Tutorials on designing CMOS comparators

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vbhupendra

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Comparator Desing paper

i want a tutorial on design of CMOS comparators.
 

Syukri

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Re: Comparator Desing paper

this is a paper
 

nga_nguyen

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Comparator Desing paper

I also want to understand about comparator
But I just newbee so i cant download!!
 

Syukri

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Re: Comparator Desing paper

Hmm..i dont know why u cant download it....

Well comparator is an op-amp that work to compare....the matter of gain and speed is vital in this...

Simply said it's a 1 bit ADC...analog input and 0 logic or 1 logic in output.
0 is close to ground and 1 is close to vdd
 

happyeveryday

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Comparator Desing paper

maybe your point is not enough
 

yaxazaa

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Re: Comparator Desing paper

Overdrive and speed are the two concerts. Smaller overdriver takes long to flop. There is a trade off.
 

icx

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Re: Comparator Desing paper

you can refer allen's and martin's book about comparator design.
 

beckchm

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Re: Comparator Desing paper

in the web , there are many
 

zaixq

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Comparator Desing paper

you can refer allen's book about comparator design
good lucky
 

mooner

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Re: Comparator Desing paper

yes, allen's description is in detailed about comparator. for example , about conception of resolution.

zaixq said:
you can refer allen's book about comparator design
good lucky
 

Steven De Bock

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Re: Comparator Desing paper

Excuse, but as I'm new I don't know if I should post my response/question here. I'm very motivated to learn about analog circuits and I hope to be able to help people out someday myself.

I bought this book from R. J. Baker: CMOS Circuit design, Layout and Simulation. I think it is a rather interesting book, covering most topics about analog/digital design.

There is a chapter about nonlinear circuits, describing a circuit with 3 stages. The first being a preamplifier, the second stage being a decision circuit (2 cross coupled devices) and the third stage being an output buffer (a simple differential amplifier with a current mirror load).

The problem is that I'm not sure in how to dimension the transistors in this kind of topology. Propagation speed is a very crucial factor in my comparator design.

Is anyone familiar with this kind of comparator topology? Is he/she willing to give me some pointers in where to find a more elaborate explanation about the workings of this type of comparator?

Thank you very much!
Steven
 

feier0251

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Comparator Desing paper

you can reference the book Operational_amplifiers-2nd_edition,and you can find it in the forum!
regards
 

Syukri

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Re: Comparator Desing paper

Maybe i give the picture...

Soory if u are not being able to download it..
 

Steven De Bock

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Re: Comparator Desing paper

Steven De Bock said:
I bought this book from R. J. Baker: CMOS Circuit design, Layout and Simulation. I think it is a rather interesting book, covering most topics about analog/digital design.

There is a chapter about nonlinear circuits, describing a comparator-circuit with 3 stages. The first being a preamplifier, the second stage being a decision circuit (2 cross coupled devices) and the third stage being an output buffer (a simple differential amplifier with a current mirror load).

The problem is that I'm not sure in how to dimension the transistors in this kind of topology. Propagation speed is a very crucial factor in my comparator design.

Is anyone familiar with this kind of comparator topology? Is he/she willing to give me some pointers in where to find a more elaborate explanation about the workings of this type of comparator?

Thank you very much!
Steven

I could still use some help on this type of comparator... So if anyone has a good article or some experience with this type of amplifier, pls let me know.
 

liambarry

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Comparator Desing paper

it is more intersting . tell more professions

Added after 1 minutes:

good ideal.
 

alexhuangying

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Re: Comparator Desing paper

Syukri said:
Maybe i give the picture...

Soory if u are not being able to download it..
dear all
I'm considering to use this comparator in my sar_adc design. but my adc has reset mode which let comparator work in the unit gain closed loop with high capacitor load (about 60pf).My question is "Is the domain pole in this comparator in the output stage?"
 

jiangnancai

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Re: Comparator Desing paper

I

want a tutorial on design of CMOS comparators too
 

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