Run clocks 3X from any other traces, generally you will only have space to route at 0.1mm/0.1mm, this is usual for todays dense high speed boards.
Use a PCB impedance calculator such as Saturn toolkit to determine the characteristic trace impedance....
With DDR interfaces you will very lucky if you have the room to route with a space of 3X the trace width, 1X is more likely.... Route the data lanes on different layers to the address and control signal. Micron has many guides for routing DDR interfaces I would suggest you go read them as well as other guides.