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Using PCB "via" for high speed traces


Advanced Member level 2
Apr 17, 2011
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For last several days, I have seen a large number of youtube videos on the subject of high speed PCB design and have also done a lot of internet search. There is one specific area that is not being covered in detail anywhere. This is the topic of "via" in PCB high speed tracks.

Nowadays we have a lot of components that use BGA which can have a large number of traces. In this case, it might not be possible to route everything on a single layer. We might have processor or FPGA that uses transceivers and high speed memory interfaces (DDR2/3) that require special care during the PCB layout stage. Here I am only focusing on the signal layout and not the PDN i.e signal integrity.

It is completely clear to me that since the PCB track behaves like transmission line, we must ensure that the impedance is uniform in the signal travel path to prevent reflections that can corrupt signal. Also, the signal tracks must not be too close to each other and have a uniform reference plane that has not break. Series of parallel termination can be used to improve the signal integrity if the on-chip termination is not present. The characteristic impedance of the track depends on the track width, the copper height, and distance from the GND plane. Everyone talks about this in detail.

Now lets come to via. What I can understand is that, the via is like a 90 deg bend in the signal path. By default it has no reference plane unless we put stiching ground vias very close to the signal via. All this means that a via will most likely create an impedance discontinuity that shall cause reflections and signal integrity problems and possibly the EM field carrying the signal to spread and also cause EMC problems. However, no one seems to go into the topic in detail. How do I know what size via to use, pad size, hole size? How many GND vias to put and how close? Some resource says that 3D solver is required to design a via but says no more. Some other resources say don't use via on high speed tracks. Yet, someone even said that via is quite smaller than signal wavelength so it will not cause reflections.

So far it seems that everyone talks about PCB track impedance subject in immense depth but not go into detail of PCB vias when via is as important as PCB track. So do we avoid via like the plague or just use any random size via and just pray that it works? What is the correct way to use vias in high speed tracks?
You are definitely looking at the wrong sources. There's e.g. "Johnson/Graham, High-speed Signal Propagation: Advanced Black Magic", paragraph 5.5 modeling vias.

To discuss detail questions, it would be necessary to specify the application range, actual speed, signal quality requirements, PCB type.

Moved to more appropriate PCB design section.
Where is this PCB Design section? I am unable to find it on the website.

I mean this section. You originally posted in "Professional Hardware and Elelectronic Design", dedicated to design standards, regulations and similar topics.
I don't think I can delete this question, or move this question. Do I just post a new question in that area that is duplicate of this one?

did you read post#2 and post#4?

In post#2 FvM clearly says he already moved your post.
In post#4 he wrote that you originally posted it in a different section.

After FvM moved it .. it´s now where it belongs to be.

How long is a piece of string...
Via are necessary to PCB design, you can use through hole via's, through hole via's backdrilled, or micro via's (stacked or offset)... How far you have to go with the complexity of a particular design, depends on the signal rise time, this give the knee frequency and thus speed of the signal. For the majority of designs, the via chosen to fit the PCB/component geometry will suffice (with BGA devices through hole are 0.25/0.20mm finished hole with a 0.50/0.45mm pad). Microvia's are my favorite, as depth of a via stack is controllable...
I would suggest you get familiar with basic high speed design, using standard via's, DDR memory layout examples and PCIe buss examples are a good place to start...

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