High speed signal routing layers

[engr_joni_ee]

Referring to section 3.2 High Speed Differential Signal Rules.

Point number 4: "When possible, route high-speed differential pair signals on the top or bottom layer of the PCB with an adjacent GND layer. TI does not recommend stripline routing of the high-speed differential signals."

Given microstrip is not symmetric compared to stripline having reference layers on top and bottom. If differential signals, there are two components, one is common signal or the common voltage level and the other is differential signal or the differential voltage level. I guess in the asymmetric geometry the speed of the common part and the differential part does not remain the same as in case of microstrip and that is the reason we do not route high speed signals on top and bottom layers. Because of symmetric geometry in case stripline, we route the high speed signals in inner layers.

But the TI document is describing something which is opposite.

Point number 5: "• Ensure that high-speed differential signals are routed ≥ 90 mils from the edge of the reference plane." I am not sure what does that means. Kindy explain this. Thanks in advance.

 

[KlausST]

Hi,

Ensure that high-speed differential signals are routed ≥ 90 mils from the edge of the reference plane." I am not sure what does that means. Kindy explain this.

What exatly is unclear?
Let´s assume a rectangle shaped copper plane. It has 4 edges. All it says: Don´t route these high speed signals close to these plane edges .. to ensure reliable and symmetrical electrical field between plane and traces.

Klaus

 

[engr_joni_ee]

Point number 5 is clear to me. Sorry was simple and clearly mentioned in the TI document.

Kindly address point number 4.

 

[marce]

A lot of designs use microstrip (surface routing) for high speed routing, faster (less propagation than stripline), half the signal is traveling through air. PCI and the various PC interface chips, allow for surface routing to the memory and other interfaces. PCIe s surface routed...

 

[engr_joni_ee]

Thanks for your comment. Then we should also use top/bottom copper layers for high speed signal routing.

 

[engr_joni_ee]

The following text is taken from the book “Signal Integrity and Power Integrity – Simplified” written by Eric Bogatin.

Chapter 11: Differential Pairs and Differential Impedance

Even and Odd Modes

There are two special voltage patterns we can launch into the pair that will propagate down the line undistorted.

The first pattern is when exactly the same signal is applied to either line; for example, the voltage transitions from 0 v to 1 v in each line.

The second special voltage pattern that will propagate unchanged down the differential pair is when the opposite-transitioning signals are applied to each line; for example, one of the signals transitions from 0 v to 1 v and the other goes from 0 v to –1 v.

To distinguish these two states, we call the state where the same voltage drives each line the even mode and the state where the opposite-going voltages drive each line the odd mode.

Velocity of Each Mode and Far-End Cross Talk

The description of the signal in terms of its components propagating in each of the two modes is especially important in edge-coupled microstrip because signals in each mode travel at different speeds.

The velocity of a signal propagating down a transmission line is determined by the effective dielectric constant of the material the fields see. The higher the effective dielectric constant, the slower the speed, and the longer the time delay of a signal propagating in that mode.

In the case of a stripline, the dielectric material is uniform all around the conductors and the fields always see an effective dielectric constant equal to the bulk value, independent of the voltage pattern.

The odd and even-mode velocities in a stripline are the same.

However, in a microstrip, the electric fields see a mixture of dielectric constants, part in the bulk material and part in the air. The precise pattern of the field distribution and how it overlaps the dielectric material will influence the value of the resulting effective dielectric constant and the actual speed of the signal. In the odd mode, more of the field lines are in air; in the even mode, more of the field lines are in the bulk material. For this reason, the odd-mode signals will have a slightly lower effective dielectric constant and will travel at a faster speed than do the even mode signals.

In a stripline, the fields see just the bulk dielectric constant for each mode. There is no difference in speed between the modes for any homogeneous dielectric interconnect.

In an edge-coupled microstrip, a differential signal will drive the odd mode so it will travel faster than a common signal, which drives the even mode.

--- Updated Dec 10, 2023 ---

Question: Should we route high speed differential signals in inner layers or outer layers ?

 

[FvM]

I don't see the verbose quote directly related to your question and particularly it's not answering it. There's no significant common mode signal involved in high speed differential signaling, thus you don't specifically care for CM impedance and propagation speed.

 

[engr_joni_ee]

There is no even mode/odd mode in high speed differential signals ?

 

[FvM]

Sure there's even and odd mode. But if you don't have common mode signal, you don't need to care for even mode impedance.

 

[engr_joni_ee]

I think I am getting it now.

If there exist even mode signal in differential signaling for example if there is a common voltage (like a DC voltage on both) in addition to differential voltage then we do care and avoid routing on top/bottom, right ?

If there is no even mode signal in differential signaling meaning no DC part then we only have true odd mode differential signaling then do not care about the even mode and we can route on top/bottom and also on inner layers, right ?

 

[engr_joni_ee]

Kindly reply to my question in post #10.

 

[infowave]

Referring to section 3.2 High Speed Differential Signal Rules.

Point number 4: "When possible, route high-speed differential pair signals on the top or bottom layer of the PCB with an adjacent GND layer. TI does not recommend stripline routing of the high-speed differential signals."

Given microstrip is not symmetric compared to stripline having reference layers on top and bottom. If differential signals, there are two components, one is common signal or the common voltage level and the other is differential signal or the differential voltage level. I guess in the asymmetric geometry the speed of the common part and the differential part does not remain the same as in case of microstrip and that is the reason we do not route high speed signals on top and bottom layers. Because of symmetric geometry in case stripline, we route the high speed signals in inner layers.

But the TI document is describing something which is opposite.

Point number 5: "• Ensure that high-speed differential signals are routed ≥ 90 mils from the edge of the reference plane." I am not sure what does that means. Kindy explain this. Thanks in advance.

Referring to section 3.2 High Speed Differential Signal Rules.

Point number 4: "When possible, route high-speed differential pair signals on the top or bottom layer of the PCB with an adjacent GND layer. TI does not recommend stripline routing of the high-speed differential signals."

Given microstrip is not symmetric compared to stripline having reference layers on top and bottom. If differential signals, there are two components, one is common signal or the common voltage level and the other is differential signal or the differential voltage level. I guess in the asymmetric geometry the speed of the common part and the differential part does not remain the same as in case of microstrip and that is the reason we do not route high speed signals on top and bottom layers. Because of symmetric geometry in case stripline, we route the high speed signals in inner layers.

But the TI document is describing something which is opposite.

Point number 5: "• Ensure that high-speed differential signals are routed ≥ 90 mils from the edge of the reference plane." I am not sure what does that means. Kindy explain this. Thanks in advance.

In the context of high-speed differential signals on a printed circuit board (PCB), let's break down the points you've mentioned from the TI (Texas Instruments) document:

Point 4: Routing High-Speed Differential Pairs​

"When possible, route high-speed differential pair signals on the top or bottom layer of the PCB with an adjacent GND layer. TI does not recommend stripline routing of the high-speed differential signals."

Explanation:​

• Microstrip vs. Stripline:
  • Microstrip refers to routing traces on the outer layers of the PCB with one reference plane (usually ground) beneath them.
  • Stripline involves sandwiching signal traces between two ground planes, offering better shielding and controlled impedance.
• Differential Signals:
  • In differential signaling, there's a common-mode signal (common to both lines) and a differential signal (the voltage difference between the two lines).
• Asymmetric Microstrip:
  • The document seems to suggest that routing high-speed differential signals on outer layers (microstrip) might lead to some asymmetry in the signal propagation, potentially affecting the common-mode and differential components differently.
• Adjacent Ground Layer:
  • Routing on the top or bottom layer with an adjacent ground layer helps maintain a close return path for the signals, reducing the loop area and improving signal integrity.
• Not Recommending Stripline:
  • While stripline might offer better signal integrity, the document may be cautioning against it, possibly due to manufacturing complexities, cost, or other design considerations.

Point 5: Routing from the Edge of the Reference Plane​

"Ensure that high-speed differential signals are routed ≥ 90 mils from the edge of the reference plane."

Explanation:​

• Edge of the Reference Plane:
  • The reference plane is typically a ground plane on an adjacent layer. The document suggests maintaining a distance of at least 90 mils (mils are a thousandth of an inch) from the edge of this ground plane.
• Reasoning:
  • This recommendation is likely made to prevent signal coupling or interference with nearby structures, components, or other traces. Keeping a distance helps maintain signal integrity by minimizing crosstalk and other undesirable effects.
• Signal Isolation:
  • By staying a sufficient distance away, you reduce the chances of the high-speed signals interfering with other traces or components near the edge of the reference plane.
• Board Manufacturing Tolerances:
  • This guideline may also account for manufacturing tolerances, ensuring that even with slight variations in the manufacturing process, the specified distance is maintained.

 

[engr_joni_ee]

@infowave

Thank you. I like the way you explained.