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Tips for test benches????

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Resistance

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HI,

I want some tips and rules of thumb to write test benches for checking large designs..
Please dont give sitters and basics..

I would be elated to get some professional tips for test benches..
links are most welcome..

regards
 

vivek

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janick Bergeron's book : "Writing Testbenches functional verification of HDL models" is the authoritative book for thumb rools and tips for verification test benches.the 1st edition covers verilog/VHDL, 2nd edition will have vera and specman/e added.
 

jjww110

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to vivek,where can i dowload 2nd edition ???
 

Resistance

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hi vivek..
can u upload the book u have mentioned .. or where can i get it from the net..

regards
 

aravind

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i think im havinf first edition.
vivek due u havce 2nd edition can u upload in books upload/download forum
 

vivek

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u can download the first edition from this site itself. search in the ebook upload/download section. As far as 2nd edition goes, i have been searching for the ebook for a long time without luck :cry:
 

liujingshu

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I think one thing you should do is understand clearly what is you design
 

yuenkit

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1st of all, which verification language you want to use?
 

foster_cn

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Writing TestBench, classic book
 

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