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[SOLVED] SystemVerilog file IO operations

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logari84

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Hi all,

I am struggling to find some documentation for file IO operations in SystemVerilog. I can't find a decent guide even for Verilog. I managed to read a file or write to a new one, but I managed to do only the very basic operation (read and write as char). What I actually need is to read and write in binary. I am not seeking for a direct solution to my problem. I would like to have a detailed documentation if someone knows where to find such a thing. Any help will be really appreciated.

Thank you,
Stam
 

Thank you for your fast reply. I've already checked this link, but can't tell if it's for SystemVerilog or Verilog. At some point I get some compilation errors when I try to use stuff from Verilog. I am very fresh to both languages and can't easily distinguish what is used in one and what in the other language.

- - - Updated - - -

It seems that I haven't noticed some details in that link. I can read in binary now. Thank you Tricky.
 

System Verilog is Verilog, the SV stuff was supposed to be new additions to Verilog, but SV should behave perfectly fine with code written adhering to the Verilog 2001 LRM.
 
If you have a design file having .sv extension and with all SV constructs, and then you do some additions using pure Verilog constructs then recompilation should not give any new errors (provided your new Verilog code is legal).

Have you explored in details the $fwrite() command?
 

My bad. It wasn't an error but a warning. Probably cause of bad call of the function. Haven't explored $fwrite() in details yet. I will do when I need it :) . But now I think I got the point of how it works. Thank you for your help.
 

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