ivlsi
Advanced Member level 3
Hi All,
What does the Synthesis-to-Layout Hand-Off include besides Netlist and Constrain file?
As for the constrains file, what format the Layout guys like to get them? Should it be passed in the TCL script or SDC file? Should all the constrains be Chip Level constrains (applied from the Top-Level Hierarchy of the chip)?
As for the synchronizes, how should I pass the information on them so that they would be placed very close one to another?
Thank you!
What does the Synthesis-to-Layout Hand-Off include besides Netlist and Constrain file?
As for the constrains file, what format the Layout guys like to get them? Should it be passed in the TCL script or SDC file? Should all the constrains be Chip Level constrains (applied from the Top-Level Hierarchy of the chip)?
As for the synchronizes, how should I pass the information on them so that they would be placed very close one to another?
Thank you!
