Stability of sample and hold circuit

[pseudockb]

Hi, I was wondering if it is neccessary to do a stability check on the circuit in hold mode? My thinking is that since there is a holding capacitor in the feedback loop, the loop is broken (from dc point of view). And also the capacitor is there to hold the charges and there should not be any flow of charges in hold mode. Please comment on it. Thanks!

 

[chungming]

You can use spectre to perform PSS analysis.
This can simulate switched cap stability.

 

[lladnar23]

It won't be a problem since you shouldn't be staying in the hold mode long enough for the charge on the cap to leak or be changed... The feedback factor is C/(C+Cin) where cin is the opamp input capacitance... so use that for your stability analysis