iamgyfan
Newbie level 3
Hello everyone,
I want to layout a MIM capacitor with virtuoso and cic018 tech. file.
The LVS rule file says that I have to use ME5 and CTM (capacitor metal, on the top layer) to do that.
But I have some problem with LVS check because I didn't find any appropriate label layer to label a pin on CTM.
Unlike ME1 ME2 ... ME6 have ME_TEXT to label them, there is no label for CTM.
Can someone help me ? Thanks a lot.
I want to layout a MIM capacitor with virtuoso and cic018 tech. file.
The LVS rule file says that I have to use ME5 and CTM (capacitor metal, on the top layer) to do that.
But I have some problem with LVS check because I didn't find any appropriate label layer to label a pin on CTM.
Unlike ME1 ME2 ... ME6 have ME_TEXT to label them, there is no label for CTM.
Can someone help me ? Thanks a lot.