shunt peaking and current mode logic

[yannik33]

Most books and articles explain shuntpeaking/inductive peaking for an CML circuits with loads connected to vdd - is there a way to use this technique for loads connected to gnd? (like in picture a.)

 

[BradtheRad]

To do what you want, the standard practice is to flip the schematic head over heels, changing N-devices to P-devices, and vice-versa.

Change bias levels to obtain proper operation.

 

[FvM]

Considering the CML common mode range, the idea would only work with relative large Vth PMOS transistors. NMOS differential pairs are the obsvious solution for CML input stages.