omara007
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vhdl combinational if
Hi folks
I have a combinational process, in which some signals are assigned values. I need a criteria to reset these signals before assigning them different values within the process. Is it possible to do the following:
If so, when will the new values of (x) and be set ?
Hi folks
I have a combinational process, in which some signals are assigned values. I need a criteria to reset these signals before assigning them different values within the process. Is it possible to do the following:
Code:
if rst_n = '0' then
x <= "000";
y <= "00";
elsif enable = '1' then
if state = state_0 then
x <= "101";
y <= "10";
elsif state = state_1 then
x <= "111";
y <= "11";
end if;
end if;
If so, when will the new values of (x) and be set ?