Why cannot the AXI specification removes the WLAST and RLAST signals as the AWLEN and ARLEN can give the indication of the last transfer in an AXI write or read burst respectively? So there is no need for WLAST and RLAST as the last transfer can be derived from AWLEN and ARLEN.
Having counters in all parts of the logic may be rather wasteful. Some parts may only be interested in a last signal. A single bit is cheaper than comparing a counter.