related to gate level simulation

[Bharath Kumar]

Hi everyone,

I have been put in a project of doing gate level simulation of an ASIC.

Please some one help me with my question.Will there be any openings for gate level simulation or Should i learn functional verification also........


With regards,
M.Bharath

 

[eshwartt]

Hi Bharath,

Learn functional verification also...There will be less or rare openings for GLS work.
GLS is subset of functional verification.

Regards,
Eshwar.

 

[salma ali bakr]

GLS is similar to RTL simulations...what is extra in it is just the gates delays...You gotta learn functional verification for both

 

[DigitalLogician]

Here is an online gate level simulator:**broken link removed**. since it is what you have to do, you may find it very useful. The site also has all sorts of interactive digital circuits.