Regarding output delay /set_output_delay/.

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prithivikumars

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Regarding output delay.

set_output_delay -clock CLK -rise -max -add_delay -0.920 [get_ports].

In the above command output delay is -ve. why it soo.
 

Regarding output delay.

-ve ?
what does it mean ?
 

Re: Regarding output delay.

hi,

my 2 cents,

output delay is to model or tell to the timing analysis tool that this much is taken by some body in the path, so a negative number and that too for a setup calculation is wrong could be a typo please check.


to know the concept of output delays or how to time the output paths
https://www.vlsichipdesign.com/static_timing_analysis.html

happy designing
chip design made easy
https://www.vlsichipdesign.com
 

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