I have designed and simulated a wideband LNA using CMOS 0.18um TSMC technology.........i want to draw a layout fr this circuit using ADS and measure the chip area it takes...can this be done? also is LVS possible in ADS?...........can anyone please help me regarding this............if Layout in ADS is not possible than plzz suggest me some other easy tool...as i have not used any layout tool before...Immediate help is appreciated
@DDavid.......yes i want silicon layout ....
plzz refer to this post fr detail of the schematic
Added after 2 minutes:
@mikekan,wireless man.......i dont have access to cadence i have only ads with me........ if it is not possible plzz tell me some layout available for freetool available fr free
in ADS, you can make a schematic, then generate corresponding layout but you need to edit silicon layers by click EMDS or Momentum -> Substrate-> Edit/Modify, or by load available substrate file (maybe TSMC has substrate file, I am not sure ).
First of all regarding to the teansistor models, in ADS they sometimes not complet like in cadence,
secondly ADS is not proper for layout (silicon), do it in mentor for example.
their is option of layout in schematic window.click that option.u see create or generate layout option.click on it. in this way u can create layout of any schematic.