Question on layout for high speed circuit

[suria3]

Hi guys,

I'm designing a optical transceiver circuit which consists of Transimpedance Amplifier (TIA) and Limiting Amplifier (LA) which operates at the speed of 1.25Gbps. Currently I'm working on the layout for the design. I have a question here on doing layout for the high speed signal line. As attached in the diagram, TIA takes in current as the input and convert to voltage, whereby LA takes in the converted voltage to maximize the output swing. So, when it comes to the layout on the main signal part, what is the minimum distance (x) I need to keep between the two output terminal so that i can minimize the crosstalk and capacitance coupling issue. Feedback from the experienced designers are welcomed.

Thanks,
Suria

 

[varma_cs012]

I can't say exactly how much space you need to maintian. You can route them with minimum spacing.
But for cross talk and coupling capacitence issues, I can give you a soulution.

Route the same metal in b/w the two signals and connect it to the AVSS.
Now you woudn't get any problem. All the cross talk and coupling capacitences will be grounded.
This concept is know as shielding. shielding net you can maintain minimum width.

Those two nets are safe from each other. Let me know if I am wrong. Thank You.
If you want to have some more information about shielding, I can give you.

 

[dmk]

I think that the Jon Varteresian's "Fabricating Printed Circuit Boards" (2002, Elsevier Science) could be helpful to you.

 

[k_90]

I agree with varma_cs012. You need to sheild them although I wouldn't go for minimum spacing, just go for as much space as your design allows I would go for at least double minimum spacing. You could also do a parallel plate sheild reduce coupling to substrate.

 

[varma_cs012]

Yup, It's always better to maintain the double spacing b/w nets in Analog. Actually it's one of the guidline that we need to follow. Prallel plate shielding will increase the security.

 

[suria3]

I agree with varma_cs012. You need to sheild them although I wouldn't go for minimum spacing, just go for as much space as your design allows I would go for at least double minimum spacing. You could also do a parallel plate sheild reduce coupling to substrate.

Thanks Varma and k_90 for the valuable feedback. So, Can I say that at the output of TIA , let say OUTP and OUTN are done using M3, so I need to place 2 metal M4 side by side of the of OUTP and OUTN, then ground the M4. What about "You could also do a parallel plate sheild reduce coupling to substrate"...can explain on this. Thanks

 

[varma_cs012]

I guess we need to discuss about the shielding concept.

Shielding: To protect a net from all the sides from out side paracitics.

How we will do it. Let's take your OUTP and OUTN only as example.

Let's assume OUTP and OUTN are routed with M3. Now we need to sheield those two nets from sidewalls. So place a shielding net with M3 and coneect them to AVSS.

Then we have shield them from up and down side. How we will do it ?

Our orginal net is with M3, Route M2 and M4 on the original M3 net. Then connect those two shielding nets M2 and M4 to AVSS. This is called parallel plate shielding.
By using M2 we are grounding the Substarate noice and by using M4 we are grounding the noise from upper metals.

If you see from cross sectional front view, your M3 (Original net) looks like in a box. Besides with M3 and up and down M2 and M4. Questions are welcome. Please let me know if I am wrong any where.

 

[k_90]

varma_cs012 explained it bang on.

In addition:

Any conductor which passes above or below a signal will introduce parastic capacitance between the conductor and the signal itself, you make sure the conductor is connected to a quiet signal.

It also has a very high cost in terms of routing resources particulary if you have a limited number of metal layers so sheilding above and below might not be possible and you need to concider if it is really nessesary.

 

[dmk]

As I wrote before, it is good to see the guidlines in
Jon Varteresian's "Fabricating Printed Circuit Boards". You can find it in EDAboards and you will understand the basics about grounding and the ways you should use striplines, etc. Just search the attachements.

 

[NightHawk_099]

As a guideline, shielding also adds to capacitance, so in you case, you want to add some distance from siganls to shields. As always, more is better (2 micron spacing from signal to shield is great, bigger than 2um you will not see much improvement. In general, space from shield to signal depens on how important the signal is, how much space you have, and how long the signal is routed.