Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Problem calculating delay

Status
Not open for further replies.

Zubair Alam

Newbie level 6
Joined
Mar 9, 2015
Messages
11
Helped
1
Reputation
2
Reaction score
1
Trophy points
3
Location
Mohammadpur,Dhaka
Activity points
78
Dear all,
I am using a 32nm FET. I have simulated the waves and calculated the delays. But the problem is when i calculated delay(hand calculation) using elmore delay(1st order) model, it doesnt match with the simulation delay. Rather its off by an order of 5(~1e5). :thinker:
Is the elmore delay valid for short channels? If not, Is there any other better delay model for short channel for hand calculation.
Note that i am not using bulk. I am using SOI structured CNFET.

Thanks and Regards,
Zubair.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top