Hi,
maybe it´s possible. But I don´t like it. The datasheet should tell if the levles of supply and logic are within the specified range.
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SPI:
I assume the ARM is the master.
* Then there are thre lines out: MOSI, SCK and CS (or SS). No device at the bus must draw signifcant current form these lines. At the devices all thes signals are inputs. So I see no reason why a divece can make the bus to "hang" caused by these three lines.
* then there is one input: MISO. This is the critical line, because all devices may drive this line. But it should be very clear that only one should drive the line. Wich one is selected by the CS line.
You should ensure that only one device hase the cs line active. Usually the CS line is active low.
A 74HC138 can be used as selector for the CS lines.
A device with CS = high (inactive) must tri-state (high Z) it´s MISO output.
A device with CS = low (active) must drive it´s MISO output.
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I used SPI many times, never had any problems with it.
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If you need detailed help, you should provide more detailed informations. Schematic, code, ...
Klaus