Placing Resistor and Capacitors in NWell In Layout

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To reduce noise coupling it is said to put resistors and capacitors in nwell in layout.

What is nwell tied too ? Is nwell also surrounded by nwell guard ring? So what is nwell guard ring connected to ? It should be quiet - so analog ground ?

The application is for a SAR ADC's capacitive DAC.

If cap and res are three terminal devices in kit - what is third terminal connected to if placing them in nwell ?
 
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In order to provide isolation, the nwell should be connected to the most positive supply terminal, together with the third terminal of the passive devices. By using the same reference for nwell and third terminals you achieve the same quietness as if these devices were in a grounded pwell. Don’t forget to connect by metal.

Still more noise decoupling (from lateral effects) is possible by surrounding the nwell by a p+ guard ring at (metal-connected) analog ground, with a bit more than minimum spacing - if you allow for the additional area consumption.
 
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