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Need help for creating a divider

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anders_senegal

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I need to find algorithmd about division in VHDL. I need divide 64 bits, 32 for the integer part and 32 for the float point part.

Can you help me????
 

I have written VHDL code for a devider for two floating point numbers using the IEEE 754 floating point format. Would it be useful for you to send it to you?
 

Yes please, it would be usefull.
Thank you.
 

I have used the structure shown in the picture in "reply.doc". Practically It is a sequence of substractors. I got it from my Professor. This structure as it is can be used only for
unsigned integers but I have written VHDL code to adapt it on IEEE 754 Format. In fact this structure implements the devision of the mantissa's, according to IEEE 754.
Certainly it's not the best solution but it works.Comments are highly welcome. Sorry if I've dissapointed you, I am just a begginer.[/img]
 

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