In your 1st posting, you state, "...write a verilog code that will accept serial data and clock ...". Your (synthesizable) verilog module will simply list 'clock', "reset", and "serial_data_in" as inputs and "nrzi_data_out" as an output - same as the top level module that you have seen in your Xilinx ISE applications. There are a gazillion websites that explain how to put together a simple verilog module and write a simple verilog testbench to verify it. If I understand your question, you should not be concerned with where the clock, reset, din, and dout come from. You only need to be concerned about the logic to convert from NRZ to NRZI.