multiple assign statements to a signal signal

[kandaka]

hi,

in one of the designs i have seen the code sth like this


assign BP = CK;
assign BP = PT0;
assign BP = PT1;

will it not create any multiple driver issue ? if we drive CK,PT0 to 'Z' then what will happen ?

what wil be resulted from this code in synthesis.

Thanks ,
Prashanthi K

 

[tariq786]

yes this is multiple driver issue. This code will not compile. Please try and let us know the result.

 

[FvM]

if we drive CK,PT0 to 'Z' then what will happen ?
what wil be resulted from this code in synthesis.

Without precisely defining a full design, there's a lot of guessing involved. But generally, the code is only synthesizable, if the design guarantees, that the net BP is not driven by more than one driver at a time, so it can be replaced by a multiplexer.