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There is a weird set of papers about Braun Multipliers in FPGAs. Some of the ideas make sense for ASICs, and apparently can work in certain cases for FPGAs.
The easiest method published was to use a carry-lookahead adder instead of the final ripple carry adder. Or maybe to use the fast carry chain for the final ripple carry adder.
The primary reason I see for braun multipliers in FPGAs is writing articles about braun multipliers in FPGAs. If you aren't writing an article about braun multipliers in FPGAs, try using "x*y" or using the builtin multipliers.
thank u so much...actually on my project and braun multiplier is important part of it...nd replacing the final ripple carry adder with CLA is good...but wat im looking forward is modification at architectural level....if u hav any idea..pls help