pieterc
Newbie level 1
vish-4014
I'm trying to simulate a very small piece of SystemVerilog code with ModelSim 6.0d. It compiles without errors, but when I try to add the signals to the wave, I get this error:
(note: there's a typo, iterface should be interface, but that shouldn't make any difference.)
Does anybody knows what this error means?
I'm trying to simulate a very small piece of SystemVerilog code with ModelSim 6.0d. It compiles without errors, but when I try to add the signals to the wave, I get this error:
Code:
# (vish-4014) No objects found matching 'sim:/test_iterface_tb_v/*'.
Does anybody knows what this error means?